High-Efficiency Concepts of c-Si Wafer Based Solar Cells

There are 3 examples of highly efficient c-Si solar cells to be discussed.  Monocrystalline wafers are used to minimise bulk recombination.  The first example is the PERL (Passivated Emitter Rear Locally diffused) concept.  The top surface of PERL solar cells is textured with inverted pyramid structures, covered by a double layer anti-reflection coating (ARC) consisting of magnesium fluoride and zinc sulfide, and a passivation of silicon oxide covers the emitter.  Very thin metal finger contacts are processed with photolithography techniques, and where they contact the emitter, the region underneath is heavily doped with phosphorus (see diagram above).  At the rear surface, point contacts heavily doped with boron are used together with thermal oxide passivation layers for the non-contacted majority region.  An efficiency of 25% was achieved on a solar cell with an area of 4cm².  V_oc above 700mV has been obtained.

The 2nd example is the interdigitated back contact (IBC) solar cell.  There is no shading on the front surface of this type of solar cell because all contacts are located at the rear surface (see diagrams above).  N-type c-Si wafers are used here because they do not suffer from light induced degradation and are less sensitive to impurities, leading to a higher quality silicon with cheaper processing.  However, the doping concentration is less uniformly distributed, so electrical properties is uneven across the same wafer, leading to lower energy yields.  Fingers can be made larger because they do not cause shading, and the rear passivation should have a low refractive index to enable reflection of light above 900nm (a backside mirror), increasing the absorption path length.  A front surface field is created by a thin and higher doped n+ layer that keeps higher hole minority densities in the n-doped bulk.  ARC and texturing are also applied on the front surface.  An efficiency of 24.2% was achieved on a wafer size of 155cm².

The 3rd example is a c-Si wafer based heterojunction made of a n-type float zone c-Si and a hydrogenated amorphous silicon (a-Si:H), also known as a HIT cell (heterojunction with intrinsic thin film).  Homojunctions refers to junctions created by doping the same semiconductor material differently, resulting in the same band gap in the p- and n-doped material. Heterojunctions refers to junctions created with 2 different semiconductor materials.

At the front surface (see diagram above), there is a thin 5nm layer of intrinsic a-Si (shown in red), and a thin layer of p-doped a-Si (blue colour).  Holes will drift to the p-layer based on this heterojunction.  Similarly at the rear surface (see diagram below), there is a layer of intrinsic a-Si (red colour), and a layer of n-doped a-Si (yellow colour).  A-Si is a very good passivation layer, but it has poor conductivity.  Hence, a layer of transparent conductive oxide (TCO) material is applied on top of the a-Si layers, such as ITO (indium tin oxide).  Having similar front and back surfaces, the HIT cell can operate in a bifacial configuration, where light can be collected from both the front and back.  A-Si can also be cheaply and easily deposited by plasma-enhanced chemical vapour deposition at low temperatures.  An efficiency of 24.7% on a wafer size of 102cm² is achieved, with V_oc of 750mV.

Reference:
4.4 High-Efficiency Concepts of c-Si Wafer Based Solar Cells, Delft University of Technology, https://www.youtube.com/watch?v=BHl3tX6uk08

Design Rules of Crystalline Silicon 3

Continuing from Design Rules of Crystalline Silicon 2:

Besides managing charge carriers, the photons in a c-Si solar cell will also have to be managed.  The optical loss mechanisms are as shown in the diagram above.  A reduction of shading losses, as discussed in Design Rules of Crystalline Silicon 2, will have to be balanced by a reduction of resistivity losses.

The second loss of reflection at the front surface has been discussed in Light Trapping II - Anti-Reflection and Trapping Methods.  Using the Rayleigh film method, an intermediate layer (interlayer) can be placed between air and the silicon wafer.  The optimum value of the refractive index of the interlayer is as follows:

n₁ = √(n₀n_s)

where n₀, n_s are the refractive indexes of air and silicon.  Hence, the refractive index of the interlayer n₁ is about 2.1 if n₀ is 1 and n_s is 4.3.

Using the concept of destructive interference, the thickness of the interlayer for a light of 500nm can be calculated:

d = λ / 4n₁

where d becomes about 60nm.

An ideal material for the interlayer is silicon nitride (a-SiN), whose refractive index is between 2 and 2.2 for a wavelength of 500nm.

In addition, texturing of the front surface will improve the coupling of light into the wafer, thereby improving the absorption path length.  This will help absorb light with wavelengths above 900nm.

The texture on wafers can be done with wet-etching (anisotropic etching) techniques.  If a c-Si wafer at an initial 100 surface orientation is etched, textured surfaces with pyramid structures of 111 orientation will be created.  With a-SiN interlayer and textured surfaces, the wafer could be made to look dark blue or almost black (see diagram below).

Reference:
4.3 Design Rules of Crystalline Silicon, Delft University of Technology, https://www.youtube.com/watch?v=qmbrGk-c-P8

Design Rules of Crystalline Silicon 2

Continuing from Design Rules of Crystalline Silicon 1:

The metal contacts grid on solar cells is as shown in the diagram above.  The main conduit in the centre is called the busbar, with fingers going from the busbar to the edge of the solar cell.  The resistance of the fingers is also in the diagram, where ρ is the electrical sensitivity of the metal, and L, W and H are the length, width and height of the finger.  If this series resistance is high, the fill factor of the solar cell will be reduced.

As seen in the diagram above, the red colour electron can move in the spacing distance S between 2 fingers.  Since the emitter has higher resistivity than the metal contact, the power loss due to the emitter resistivity scales with finger spacing to a power of 3.

It must be noted that if there are more metal finger contacts, there will be more shading of the solar cell.  Shading means that light cannot reach the solar cell.  Hence, while having more metal fingers will lead to less loss of power generated, there cannot be too many fingers with widths too wide to block the light from the solar cell.

Similar occurences happen at the back contacts - the back surface of the solar cell.  Holes are collected at the back contact, but since electrons are the only charge carriers in metals, the holes will recombine with electrons from the back contact at the contact interface.  The distance between the p-n junction and the back contact should not be more than the average diffusion lengths of minority electrons in the p-layer.

However, defects at the metal-semiconductor interface of the back contact will still lead to SRH recombinations.  Hence, the area of the interface should be reduced by making point contacts (see diagram above).  The rest of the rear interface should be covered by an insulating passivation layer like the front surface.

In addition, a back surface field should be created by heavily p doping the point interfaces of the back contact (see diagram above).  This will create an additional space charge region at the interface that acts like a p-n junction, preventing minority electrons from moving from the p-layer to the p++ back contact region.  Hence, there is higher minority electron density in the p-layer.



Reference:
4.3 Design Rules of Crystalline Silicon, Delft University of Technology, https://www.youtube.com/watch?v=qmbrGk-c-P8

Design Rules of Crystalline Silicon 1

In a conventional p-type crystalline silicon (c-Si) wafer based solar cell (see diagram above), the yellow n-doped layer (emitter layer) is much thinner than the rest of the wafer.  This is because most light is absorbed close to the front surface of the solar cell (first 10 microns).  A thin front emitter layer allows the excited charge carriers to be within diffusion lengths of the p-n junction.

There are 3 parts to the charge collection process: the emitter layer, the metal contacts, and the back contact.  Aluminium is used as a cheap conductor for metal contacts, which is more conductive than the emitter layer.  Electrons will have to diffuse laterally through the emitter layer to the metal contacts to be collected.

In order to reduce SRH recombination for higher carrier lifetimes, the surface recombination velocity has to be reduced.  This surface recombination arises due to the many defects on a bare c-Si surface, where surface silicon atoms have valence electrons that cannot make molecular orbitals with absent neighbouring atoms.  These are called dangling bonds.  Since most carriers are generated close to the front surface, high surface recombination velocity will result in large losses of carriers, and thereby resulting in lower J_sc.

There are 2 ways to reduce surface recombination.  Firstly, a thin insulator layer can be deposited on the front surface, which restores the bonding environment of the silicon atoms and force electrons to move inside the emitter layer.  Silicon oxide and silicon nitride are the usual chemical passivation layers used.

Secondly, the minority charge carrier density at the surface region limits the surface recombination velocity, and hence has to be reduced.  This can be done by increasing the p-layer's doping, but this also reduces the diffusion lengths of minority holes in the emitter layer.  Hence, it is not viable for the whole emitter layer.

However, this can be applied at the metal-emitter interface region, where an insulating passivation layer cannot be used.  There is a high interface recombination velocity at the metal-emitter interface.  Moreover, the metal-semiconductor interface induces a barrier for majority charge carriers, which gives rise to higher contact resistance.  Hence, the area of contact between the metal and emitter should be reduced, while the emitter directly under the metal contact should be heavily doped to N+ or N++.



Reference:
4.3 Design Rules of Crystalline Silicon, Delft University of Technology, https://www.youtube.com/watch?v=qmbrGk-c-P8

Manufacturing of Crystalline Silicon

Metallurgical silicon is the lowest quality of silicon that can be produced and is 98-99% pure.  It is made from melting quartzite, a rock of pure silicon oxide, and mixing with carbon.

Polysilicon is the next lowest quality of silicon and is made by the Siemens process.  Impurities are removed by distillation in the process, and a pure silicon material is grown by chemical vapour deposition requiring high temperatures.  The Siemens process' energy consumption is very high.

An alternative to the Siemens process is the fluidized bed reactors (FBR), which uses lower temperatures and hence consume much less energy.  The purity of polysilicon can be as high as 99.9999%.

If the purity of polysilicon is not required, upgraded metallurgical silicon can be made cheaply by blowing gases through the silicon melt to remove impurities.

To make monocrystalline silicon ingots, which are solids that is one big continuous crystal, there are 2 methods.  The Czochralski processing method allows doping, orientation of the crystal to (100) or (111), and production of large crystals.

The float zone process allows the creation of ingots with very low densities of impurities like oxygen and carbon.  It also allows doping, but the size of the ingot is limited.

Polysilicon (multicrystalline silicon) can also be produced by silicon casting, where melting is done in a dedicated crucible, and the melt is poured into a growth crucible to solidify.  If melting and solidification are done in the same crucible, it is called directional solidification.

Finally, 2 methods can be used to create wafers out of ingots.  Sawing can be done, but it generates a large proportion of wasted silicon called kerf loss, and requires polishing.  Silicon ribbon is the next method.  It pulls ribbons of silicon out of silicon melt before cutting them into wafers.  Further treatment is needed, but the electronic quality of ribbon silicon is still not as good as monocrystalline silion.



Reference:
4.2 Manufacturing of Crystalline Silicon, Delft University of Technology, https://www.youtube.com/watch?v=Oqk4H2Ji79k

Properties of Crystalline Silicon

The lattice structure of crystalline silicon is cubic diamond, and has long range order and symmetry.  Different cuts can be made across and through the lattice to see different planes (see diagram above).  For the (100) surface, whose normal points in the [100] direction, the plane has 2 valence electrons pointing to the front.  For the (111) surface, the plane has 1 valence electron pointing in the direction of the normal to the plane.

The electronic band dispersion diagram (see diagram above) shows the indirect band gap of silicon.  The vertical axis shows the energy level of the valence and conduction bands, while the horizontal axis shows the crystal momentum (momentum of the charge carriers), the lattice momentum in various directions.  To get excited into the conduction band, electrons in the valence band require a change in energy and momentum.  The band gap of silicon as shown magnified in the diagram below, consists of the lowest point of the conduction band at x, which is indicative of the [100] direction, and the highest energy value of the valence band at gamma.

The indirect band gap energy required is the difference between the energy levels at x and gamma and equals 1.12eV or a maximum wavelength of 1107nm.  There can also be direct transition of electrons, where the direct band gap energy required is found at gamma.  The value is 3.4eV or a maximum wavelength of 364nm, which is the blue spectral part.  Hence, it is more difficult to excite electrons into the conduction band for silicon, as compared to direct band gap materials like GaAs and InP.  This also means that the absorption coefficient is much lower (see diagram below).

Germanium is also an indirect band gap material, but it has a low band gap of 0.67eV, so it starts absorbing light at wavelengths below 1850nm, with direct transitions at lower wavelengths at certain momentum-space directions.

Referring to the diagram above, assuming a EQE of 1, a silicon band gap of 1.12eV corresponding to a wavelength of 1107nm will lead to a theoretical maximum J_sc of about 45mA/cm².  This is the spectral utilisation consideration.

Referring to the diagram above, using Lambert-Beer's law, it can be seen that to absorb a higher wavelength of 970nm, a longer absorption path length of 230 microns is required to absorb 90% of all incident light.  This is a typical thickness of silicon wafer and shows the importance of light trapping techniques for crystalline silicon absorber layers for wavelengths above 900nm.

Finally, consider band gap utilisation as determined by recombination losses, where only Auger and SRH recombination are considered due to silicon's indirect band gap transitions.  Here, 2 types of silicon have to be considered: monocrystalline silicon (single crystalline) and polycrystalline silicon (polysilicon).  Single crystalline has an unbroken crystalline lattice up to the edges.  Polysilicon consists of many small crystalline grains in random orientations, meaning that there's many grain boundaries (see diagram below).

Hence, polysilicon has many lattice mismatches, which leads to defects at the grain boundaries, so the lifetime of charge carriers is shorter than single crystalline.  There is a lot of SRH recombinations.  Generally, the larger the grain size, the charge carrier lifetimes will be longer.  This means that band gap utilisation is better, and the V_oc will be larger.



Reference:
4.1 Properties of Crystalline Silicon, Delft University of Technology, https://www.youtube.com/watch?v=rPeBUO_08GE

Light Trapping II - Anti-Reflection and Trapping Methods

When light reaches an interface between 2 media having different refractive indices, the incident light will usually be partly reflected and partly transmitted.  Consider a light ray arriving from the left as shown in the diagram above.  The light ray's behaviour will be described as follows:

Snell's Law: n₁sinθ_i = n₂sinθ_t

θ_i = θ_r

where n₁, n₂ are the refractive indices of the 2 media, and θ_i, θ_r, θ_t are the angles of incidence, reflection, and transmission of the light ray.

If n₁ < n₂, θ_i > θ_t
If n₁ > n₂, θ_i < θ_t

Light rays are light waves with electric field oscillations as shown in the diagram above.  P-polarised light is light with the electric field oscillating in the plane of incidence.  S-polarised light is light with the electric field oscillating perpendicular to the plane of incidence.  The reflection and transmission coefficients are given by the Fresnel equations below:

When light is incident perpendicularly:
θ_i = θ_t = 0°
R_p = R_s
T_p = T_s

As seen in the diagram above, the Brewster angle is the angle of incidence where R_p = 0.  The grey line represents the average of R_p and R_s, which is randomly polarised light.

When n₁ > n₂, there will be a θ_i where θ_t = 90°.  This θ_i is known as the critical angle.  For all θ_i larger than the critical angle, there will be total internal reflection where no θ_t exists.  This is because the light rays are completely reflected.

The optical losses due to reflection between 2 media such as air and silicon is quite high because silicon has a high refractive index.  Hence, an interlayer (Rayleigh film) with a refractive index between air and silicon should be applied between air and silicon.  The diagram below shows the final outcome.  With more than one interlayer, reflection losses can be reduced further.  This is known as refractive index grading.

Another way to do anti-reflection is by super-imposing light waves.  This will lead to constructive and destructive interference of light.  Consider the diagram below.  The yellow wave is the incident light.  The green and red waves are the reflections back from the first and second interface.  Since the green and red waves appear to be in anti-phase, the total amplitude of the electric field of the final wave leaving the system is smaller.  The total irradiance lost is smaller too.

The maximum destructive interference is given by a thickness of the interlayer that is:

d = λ / 4n₂

where λ is the wavelength, and n₂ is the refractive index of the interlayer.

The last way to do anti-reflection is by using textured interfaces.  The size and scale of textured features is usually larger than the wavelength of light, which helps to couple light into the interlayer (see diagrams below).  The importance of this method cannot be over-emphasised.

Another consideration is that the absorber layer is not thick enough to absorb all light, and some light is transmitted.  Usually, absorption coefficients are higher for blue light compared to red and infrared.  The red light transmitted can be reflected back by the back reflector, or be parasitically absorbed at the back contact/reflector.



Reference:
3.3.5 Light Trapping II - Anti-Reflection and Trapping Methods, Delft University of Technology, https://www.youtube.com/watch?v=gyzzaZw6sC4